In this paper, we use Power gating technology to reduce power consumption on the SRAM Cell in 45nm technology. We have compared the correlation line in normal conditions, reduce the VM, the VM at the same time, reduce the VSL increases with increase VSL in the case line provides 1.2 V, V 1.4, 1V and the case of the line provided 1.2 in the temperature conditions-21, plummeting, 21, 100oC. The result achieved is the reduction of the VM and increase VSL with the voltage supply 1V is optimized for.And depending on the application that we will choose the techniques of technology Power geting to match. For example, in applications that use SRAM in devices with limited power supply (battery, solar battery, ...) without a high response rate (mobile, the sensor ...), we should use the best technique is to use both decrease and increase VM VSL. What if in the devices on need more processor speed (like smarphone, the node information processing of the sensor ...) then we can use the technique reduced or increased VM VSL (for increase VSL is not recommended because of the high energy-consuming). But for other applications of the SRAM as in the desktop PC, the devices handle supply directly (wifi module, hub, switch, the device need fast response), we can use the technique increased the VSL.In the future, we will further research about the delay of the technique in the 45nm technology, along with a deeper understanding about the weak I affect SRAM Cell, learn techniques to reduce power consumption, smaller 45nm technology, ...
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