Because of the delay buffer has relatively low accuracy (Min step = 2 buffer). To solve this problem we use a block tuning to refine accuracy from 80ps to 10ps. Tuning block is controlled by $ c_sel <4: 0> $. In that $ c_sel <3: 0> $ user in default, $ c_sel <4> $ is used if the value of the range to be measured pass the measuring block measure. Tuning block delay a step is 10ps. Based on 4-bit controller could calculate the delay between the two paths. For example: \
\ Delay of path0 = tdt0
tdt1 Delay of path1 = \
$ c_sel <3: 0> $ = 1001 = 9 \
So we have differences between the two path delay is: tdl1 - tdl0 = $ 9 * $ 10 = 90 (ps). \
So we have differences between the two path delay is: tdl1 - tdl0 = 9 x 170 = 1530 (ps). \
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